1. Field of the Invention
The present invention relates to a drive circuit, and more specifically to a drive circuit that is suitable for an application in which a capacitive load is driven with a relatively low voltage, such as in a low-voltage drive circuit for the opposing electrodes or signal lines of a liquid crystal display.
2. Description of Related Art
There have descriptions in the literature regarding a low-power-consumption drive circuit and driving method for driving a capacitive load such as the signal line of a flat display, there have been description such as, for example, the technical description of an AC-driven plasma display drive circuit (pp. 92-95 of Vol. 18 of the 1987 Society for Information Display International Symposium Digest).
FIG. 18 shows the drive circuit which is described in the above-noted paper. Referring to FIG. 18, in a prior art plasma display drive circuit, the connection node N1 between the switching elements 45 and 46, one end each of which is connective to the load capacitance 7, and the other end of each is connected to the power supply Vdd and to ground, respectively, is connected to one end of the coil 41, the other end of which is connected in common to both the cathode of the diode 47 and the anode of the diode 48, the anode of the diode 47 and the cathode of the diode 48 being connected, via the switching elements 43 and 44, respectively, to one end of the capacitance 42, the other end of which is grounded, the driving circuit as mentioned above driving the load capacitance 7.
The switching elements 43 through 46 are formed by analog switching circuits. In the above-cited paper, while the only configuration for the switching element is an NMOS transistor, to the base of which the substrate is shorted, to include in FIG. 18 wide range of element configurations, this is shown as a general analog switching circuit. In FIG. 18, diode 47 and diode 48 are often included in an NMOS transistor, to the source of which the substrate is shorted. The same type of configuration as in the drive circuit shown in FIG. 18 is disclosed also in, for example, the Japanese Unexamined Patent Publication (KOKAI) No. 6-274125.
In the prior art plasma display drive circuit which is shown in FIG. 18, the example is that in which the value of the drive voltage (Vdd) is a high voltage such as 100 V. However, in a drive circuit of the past such as shown in FIG. 18, in the ease of a relatively low drive voltage, such as when the drive voltage is less than about 5 V, there is a problem in that the power consumption becomes large.
With regard to the above-noted problem, we will first describe the problem as it relates to the operation of the prior art drive circuit which is shown in FIG. 18. In the drive circuit which is shown in FIG. 18, the terminal voltage of the load capacitance 7 is periodically driven to 0 V and to Vdd volts with low power, such as 5 V or the like. The process occurs as follows.
(1) With the switching elements 43, 45, and 46 all in OFF condition, the switching element 44 is turned ON for a period of time that is approximately 1/2 of the period of the resonant frequency of the series LC resonant circuit form by the coil 41, the capacitance 42, and the load capacitance 7, the electrical charge which is stored in the load capacitance 7 being thereby transferred to the coil 41 (first time period).
(2) With the switching elements 43, 44, and 45 all in OFF condition, the switching element 46 is turned ON (second time period).
(3) With the switching elements 44, 45, and 46 all in OFF condition, the switching element 43 is turned ON for a period of time that is approximately 1/2 of the period of resonance period, the electrical charge that is stored in the coil 41 being thereby transferred to the load capacitance 7 (third time period).
(4) With the switching elements 43, 44, and 46 all in OFF condition, the switching element 45 is turned ON (fourth time period).
The above-noted process steps (1) through (4) are repeated in sequence.
In the above-noted first time period, the electrical charge stored in the load capacitance 7 by the drive voltage Vdd is transferred to the coil 41 using the series LC resonance phenomenon. In the above-noted second time period, the terminal voltage of the load capacitance 7 is maintained at 0 V.
In the above-noted third time period, the electrical charge which was transferred to the coil 41 is returned to the load capacitance 7, the terminal voltage of which rises to a voltage of approximately Vdd. Then, in the fourth time period, the terminal voltage of the load capacitance 7 is set to and held at the voltage Vdd.
In this driving method, because electrical energy is only dissipated in the parasitic resistance components of the coil, switching elements, and diodes, it is possible to drive the terminal voltage of the load capacitance 7 periodically to 0 V and Vdd.
As is indicated in the above-cited reference as well, in a drive circuit of the past such as shown in FIG. 18, in the case in which the drive voltage is, for example, a value of Vdd such as 100 V, it is possible to perform low-power-consumption drive.
If, however, the drive voltage Vdd is a low voltage of 5 V or lower, it is not possible to perform low-power-consumption drive with the prior art drive circuit shown in FIG. 18.
This reason for this is that, in the drive circuit which is shown in FIG. 18, the forward voltage (Vf) of the diodes 47 and 48, which has a value of approximately 0.6 to 1 V, is non-negligible with respect to a drive voltage of 5 V.
In the case of diode 48, because when the cathode potential thereof rises to (Vdd-Vf), it is switched off, when the terminal voltage of the load capacitance 7 drops, it drops only to the forward voltage Vf of the diode but does not drop down to 0 V.
In the case of diode 47 as well, because when the cathode potential thereof rises to (Vdd-Vf), it is switched off, when the terminal voltage of the load capacitance 7 rises as well, because it only rises to (Vdd-Vf), the energy that must be supplied from the Vdd power supply is large.
Thus, in the case of a low-voltage drive liquid crystal display or the like, it is difficult with a prior art drive circuit such as shown in FIG. 18 to perform low-power-consumption drive.
Therefore, the present invention was made in consideration of the above-noted situation, and has as an object the provision of a drive circuit which is capable of low-power-consumption operation, even in the case of a capacitive load with a relatively low drive voltage.